Norwood, MA, U.S.A. --- (METERING.COM) --- May 26, 2009 - New simultaneous sampling analog-to-digital converters (ADCs) that simplify the design of next generation powerline monitoring systems have been introduced by Analog Devices, Inc.
The need for more efficient utility substations and smart grid management is growing as worldwide electricity demand increases. Electric utility companies need powerline monitoring systems to monitor and control energy consumption, cost, and quality, as well as to protect expensive equipment from power surges and severe storms.
Available in eight, six or four channel options, the 16 bit, eight channel AD7606 and 14 bit, eight channel AD7607 simultaneous sampling ADCs achieve signal-to-noise ratio (SNR) performance of 90 dB. The optional oversampling mode further improves SNR performance, reduces code spread, and enhances anti-alias rejection. Multi-channel integration facilitates three-phase current and voltage measurement and neutral monitoring in substation equipment. This enables powerline monitoring systems to observe and manage abnormal events occurring on a power grid, such as electrical faults or short circuits.
“The new simultaneous sampling ADCs provide the resolution and performance needed for next generation power line monitoring system designs that ensure the reliable delivery of electricity to millions of people in nearly all corners of the world,” said Leo McHugh, product line director, precision signal processing, Analog Devices.
The AD7606 and AD7607 ADCs operate on a 5 V analog supply, 1.8 V to 5 V logic supply, and feature a front-end, anti-alias filter with high input impedance and input clamp to ±16.5 V. In addition, an internal reference and a reduced decoupling capacitor requirement provide a higher level of integration compared to alternative solutions. The new devices offer true bipolar analog input ranges of ±5 V and ±10 V that allow for the preservation of phase information while sampling bipolar voltages and currents over a wide dynamic range.
Other features include on-chip LDOs (low drop out regulators), a reference and reference buffer, track-and-hold circuitry, signal conditioning circuitry, on-chip conversion clock, and high speed parallel and serial interfaces. The new devices also feature low noise, high input impedance (independent of sample rate), signal scaling amplifiers that provide 10 kHz input bandwidth (–3 dB), and 1 MΩ analog input impedance with only 0.1% gain error and 0.01% offset error.
The AD7606 and AD7607 ADCs integrate a front-end, anti-alias filter with attenuation of approximately 40 dB while sampling at a fast throughput rate up to 200 kSPS. The conversion process and data acquisition are controlled using CONVST signals and an internal oscillator. Two CONVST pins allow the simultaneous sampling of all eight analog inputs or two groups of four analog input channels to allow for phase differences between transformers.